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| TECHNICAL DATA IL34118 Voice Switched Speakerphone Circuit The IL34118 Voice Switched Speakerphone Circuit incorporates the necessary amplifiers, attenuators, level detectors, and control algorithm to form the heart of a high quality hands-free speakerphone system. Included are a microphone amplifier with adjustable gain and MUTE control, Transmit and Receive attenuators which operate in a complementary manner, level detectors at both input and output of both attenuators, and background noise monitors for both the transmit and receive channels. A Dial Tone Detector prevents the dial tone from being attenuated by the Receive background noise monitor circuit. Also included are two line driver amplifiers which can be used to form a hybrid network in conjunction with an external coupling transformer. A high pass filter can be used to filter out 60 Hz noise in the reseive channel, or for other filtering functions. A Chip Disable pin permits powering down the entire circuit to conserve power on long loops where loop current is at a minimum. The IL34118 may be operated from a power supply, or it can be powered from the telephone line, requiring typically 5.0 mA. The IL34118 can be interfaced directly to Tip and Ring (through a coupling transformer) for stand-alone operation, or it can be used in conjunction with a handset speech network and or other features of a featurephone. * Improved Attenuator Gain Range: 52 dB Between Transmit and Receive * Low Voltage Operation for Line-Powered Applications (3.06.5 V) * 4 Point Signal Sensing for Improved Sensitivity * Background Noise Monitors for Both Transmit and Receive Paths * Microphone Amplifier Gain Set by External Resistors - Mute Function Included * Chip Disable for Active Standby Operation * On Board Filter Pinned-Out for User Deined Function * Dial Tone Detector to Inhibit Receive Idle Mode During Dial Tone Presence ORDERING INFORMATION IL34118N Plastic IL34118DW SOIC TA = -25 to 70 C for all packages PIN ASSIGNMENT 1 IL34118 SIMPLIFIED BLOCK DIAGRAM FUNCTIONAL DESCRIPTION INTRODUCTION The fundamental difference between the operation of a speakerphone and a handset is that of half-duplex versus full-duplex. The handset is full duplex since conversation can occur in both directions (transmit and receive) simultaneousiy. A speakerphone has higher gain levels in both paths, and attempting to converse full duplex results in oscillatory problems due to the loop that exists within the system. The loop is formed by the receive and transmit paths, the hybrid, and the acoustic coupling (speaker to microphone). The only practical and economical solution used to data is to design the speakerphone to function in a half duplex mode - i.e., only one person speaks at a time, while the other listens. To achieve this requires a circuit which can detect who is talking, switch on the appropriate path (transmit or receive), and switch off (attenuate) the other path. In this way, the loop gain is maintained less than unity. When the talkers exchange function, the circuit must quickly detect this, and switch the circuit appropriately.By providing speech level detectors, the circuit operates in a "hand-free" mode, eliminating the need for a "push-to-talk" switch. The handset, by the way, has the same loop as the speakerphone. But since the gains are considerably lower, and since the acoustic coupling from the earpiece to the mouthpiece is almost non-existent (the receiver is normally held against a person's ear), oscillations don't occur. The IL34118 provides the necessary level detectors, attenuators, and switching control for a properly operating speakerphone. The detection sensitivity and timing are externally controllable. Additionally, the IL34118 provides background noise monitors which make the circuit insensitive to room and line noise, hybrid amplifiers for interfacing to Tip and Ring, the microphone amplifier, and other associated functions. ATTENUATORS The transmit and receive attenuators are complementary in function, i.e., when one is at maximum gain (+6.0 dB), the other is at maximum attenuation (-46 dB), and vice versa. They are never both fully on or both fully off. The sum of their gains remains constant (within a nominal error band of 0.1 dB) at a typical value of -40 dB. Their purpose is to control the transmit and receive paths to provide the half-duplex operation required in a speakerphone. The attenuators are non-inverting, and have a 3.0 dB (from max gain) frequency of 100 KHz. The input impedance of each attenuator (TXI and RXI) is nominally 10 k (see Figure 1), and the input signal should be limited to 350 mVrms (990 mVp-p) to prevent distortion. That maximum 2 IL34118 recommended input signal is independent of the volume control setting. The diode clamp on the inputs limits the input swing, and therefore the maximum negative output swing. This is the reason for VRXOL and VTXOL specification being defined as they are in the Electrical Characteristics. The output impedance is <10 until the output current limit (typically 2.5 mA) is reached. Figure 1. Attenuator Input Stage at -240 millivolts with respect to VB, the circuit is in the transmit mode (transmit attenuator is at +6.0 dB). The circuit is in an idle mode when the CT voltage is equal to VB, causing the attenuators' gains to be halfway between their fully on and fully off positions (-20 dB each). Monitoring the CT voltage (with respect to VB) is the most direct method of monitoring the circuit's mode. The inputs to the Control Block are seven: 2 from the comparators operated by the level detectors, 2 from the background noise monitors, the volume control, the dial-tone detector, and the AGC circuit. These seven inputs are described below. LEVEL DETECTORS The attenuators are controlled by the single output of the Control Block, which is measurable at the CT pin (Pin 14). When the CT pin is at +240 millivolts with respect to VB, the circuit is in the receive mode (receive attenuator is at +6.0 dB). When the CT pin is There are four level detectors - two on the receive side and two on the transmit side. Refer to Figure 2 the terms in parentheses form one system, and the other terms form the second system Figure 2. Level Detectors Each level detector is a high gain amplifier with back-to-back diodes in the feedback path, resulting in non-linear gain, which permits operation over a wide dynamic range of speech levels. The sensitivity of each level detector is determined by the external resistor and capacitor at each input (TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and limiting resistor, thus providing a dc representation of the input ac signal level. The outputs have a guick rise time (determined by the capacitor and an internal 350 resistor), and a slow decay time set by an internal current source and the capacitor. The capacitors on the four outputs should have the same value (10%) to prevent timing problems. Referring to Figure 8, on the receive side, one level detector (RLI1) is at the receive input receiving the same signal as at Tip and Ring, and 3 IL34118 the other (RLI2) is at the output of the speaker amplifier. On the transmit side, one level detector (TLI2) is at the output of the microphone amplifier, while the other (TLI1) is at the hybrid output. Outputs RLO1 and TLO1 feed a comparator, the output of which goes to the Attenuator Control Block. Likewise, outputs RLO2 and TLO2 feed a second comparator which also goes to the Attenuator Control Block. The truth table for the effects of the level detectors on the Control Block is given in the section describing the Control Block. the gain of the receive attenuator is reduced, and the gain of the transmit attenuator is increased such that their sum remains constant. Changing the voltage at VLC changes the voltage at CT (see the Attenuator Control Block section), which in turn controls the attenuators. The volume control setting does not affect the maximum attenuator input signal at which notice able distortion occurs. The bias current at VLC is typically 60 nA out of the pin, and does not vary significantly with the VLC voltage or with VCC. BACKGROUND NOISE MONITORS DIAL TONE DETECTOR The purpose of the background noise monitors is to distinguish speech (which consists of bursts) from background noise (a relatively constant signal level). There are two background noise monitors - one for the receive path and one for the transmit path. Refering to Figure 2, the receive background noise monitor is operated on by the RLI1-RLO1 level detector, while the transmit background noise monitor is operated on by the TLI2-TLO2 level detector. They monitor the background noise by storing a dc voltage representative of the respective noise levels in capacitors at CPR and CPT. The voltages at these pins have slow rise times (determined by the external RC), but fast decay times. If the signal at RLI1 (or TLI2) changes slowly, the voltage at CPR (or CPT) will remain more positive than the voltage at the non-inverting input of the monitor's output comparator. When speech is present, the voltage on the noninverting input of the comparator will rise quicker than the voltage at the inverting input (due to the burst characteristic of speech), causing its output to change. This output is sensed by the Attenuator Control Block. The 36 mV offset at the comparator's input keeps the comparator from changing state unless the speech level exceeds the background noise by 4.0 dB. The time constant of the external RC (4.7 seconds) determines the response time to background noise variations The dial tone detector is a comparator with one side connected to the receive input (RXI) and the other input connected to VB with a 15 mV offset (see Figure 3). If the circuit is in the receive mode, and the incoming signal is greater than 15 mV (10 mVrms), the comparator's output will change, disabling the receive idle mode. Tthe receive attenuator will then be at a setting determined solely by the volume control. The purpose of this circuit is to prevent the dial tone (which would be considered as continuous noise) from fading away as the circuit would have the tendency to swich to the idle mode. By disabling the receive idle mode, the dial tone remains at the normally expected full level. Figure 3. Dial Tone Detector AGS The AGS circuit affects the circuit only in the receive mode, and only when the supply voltage (VCC) is less than 3.5 volts. As VCC falls below 3.5 volts, the gain of the receive attenuator is reduced. The transmit path attenuation changes such that the sum of the transmit and receive gains remains constant. The purpose of this feature is to reduce the power (and current) used by the speaker when a linepowered speakerphone is connected to a long line, where the available power is limited. By reducing the speaker power, the voltage sag at VCC is controlled, preventing possible erratic operation. VOLUME CONTROL The volume control input at VLC (Pin 13) is sensed as a voltage with respect to VB. The volume control affects the attenuators only in the receive mode. It has no effect in the idle or transmit modes. When in the receive mode, the gain of the receive attenuator will be +6.0 dB, and the gain of the transmit attenuator will be -46 dB only when VLC is equal to VB. As VLC is reduced below VB, 4 IL34118 ATTENUATOR CONTROL BLOCK The Attenuator Control Block has the seven inputs described above: - Tthe output of the comparator operated by RLO2 and TLO2 (microphone/speaker side) - designated C1. - The output of the comparator operated by RLO1 and TLO1 (Tip/Ring) side) - designated C2. - The output of the transmit background noise monitor - designated C3. - The output of the receive background noise monitor - designated C4. - The volume control. - The dial tone detector. - The AGC circuit. The single output of the Control Block controls the two attenuators. The effect of C1-C4 is as follows: Inputs Output C1 C2 C3 C4 Mode Tx Tx 1 X Transmit Tx Rx Y Y Fast Idle Rx Tx Y Y Fast Idle Rx Rx X 1 Receive Tx Tx 0 X Slow Idle Tx Rx 0 0 Slow Idle Rx Tx 0 0 Slow Idle Rx Rx X 0 Slow Idle X = Don't Care; Y = C3 and C4 are not both 0 A definition of the above terms: 1) "Transmit" means the transmit attenuator is fully on (+6.0 dB), and the receive attenuator is at max. attenuation (-46 dB). 2) "Receive" means both attenuators are controlled by the volume control. At max. volume, the receive attenuator is fully on (6.0 dB), and the transmit attenuator is at max. attenuation (46 dB). 3) "Fast Idle" means both transmit and receive speech are present in approximately equal levels. The attenuators are quickly switched (30 ms) to idle until one speech level dominates the other. 4) "Slow Idle" means speech has ceassed in both transmit and receive path. The attenuators are then slowly switched (1 second) to the idle mode. 5) Switching to the full transmit or receive modes from any other mode is at the fast rate (30 ms). A summary of the truth table is as follows: 1) The circuit will switch to transmit if: a) both transmit level detectors sense higher signal levels relative to the respective receive level detectors (TLI1 versus RLI1, TLI2 versus RLI2), and b) the transmit background noise monitor indicates the presence of speech. 2) The circuit will switch to receive if: a) both receive level detectors sense higher signal levels relative to the respective transmit level detectors, and b) the receive background noise monitor indicates the presence of speech. 3) The circuit will switch to the fast idle mode if the level detectors disagree on the relative strengths of the signal levels, and at least one of the background noise monitors indicates speech. For example, refferring to the Expanded Logic Diagram (Figure 8), if there is sufficient signal at the microphone amp output (TLI2) to override the speaker signal (RLI2), and there is sufficient signal at the receive input (RLI1) to override the signal at the hybrid output (TLI1), and either or both background monitors indicate speech, then the circuit will be in the fast idle mode. Two conditions which can cause the fast idle mode to occur are a) when both talkers are attempting to gain control of the system by talking at the same time, and b) when one talker is in a very noisy environment, forcing the other talker to continually override that noise level. In general, the fast idle mode will occur infrequently. 4) The circuit will switch to the slow idle mode when a) both talkers are quiet (no speech present), or b) when one talker's speech level is continuously overriden by noise at the other speaker's location. The time required to switch the circuit between transmit, receive, fast idle and slow idle is determined in part by the components at the CT pin (Pin 14). A schematic of the CT circuitry is shown in Figure 4 and operates as follows: - RT is typically 120 k, and CT typically 5.0 F. - To switch to the receive mode, I1 is turned on (I2 is off), charging the external capacitor to +240 mV above VB. (An internal clamp prevents further charging of the capacitor.) - To switch to the transmit mode, I2 is turned on (I1 is off) bringing down the voltage on the capacitor to -240 mV with respect to VB. - To switch to idle quickly (fast idle), the current sources are turned off, and the internal 2.0 k resistor is switched in, discharging the capacitor to VB with a time constant = 2.0 K x CT. - To switch to idle slowly (slow idle), the current sources are turned off, the switch at the 2.0 k resistor is open, and the capacitor discharges to VB through the external resistor RT with a time constant = RT x CT. 5 IL34118 Figure 4. CT Attenuator Control Block Circuit HYBRID AMPLIFIERS The two hybrid amplifiers (at HTO+, HTO-, and HTI), in conjunction with an external transformer, provide the two-to-four wire converter for interfacing to the telephone line. The gain of the first amplifier (HTI to HTO-) is set by external resistors (gain = RHF/RHI in Figure 8), and its output drives the second amplifier, the gain of which is internally set at -1.0. Unlike most op-amps, the amplifiers have an all-NPN output stage, which maximizes phase margin and gain-bandwidth. This feature ensures stability at gains less than unity, as well as with a wide range of reactive loads. The open loop gain of the first amplifier is typically 80 dB, and the gain bandwidth of each amplifier is 1.0 MHz. The maximum p-p output swing of each amplifier is typically 1.2 volts less than VCC with an output impedance of <10 until current limiting is reached (typically 8.0 mA). The output current capability is guaranteed to be a minimum of 5.0 mA. The bias current at HTI is typically 30 nA out of the pin. The connections to the coupling transformer are shown in the Expanded Logic Diagram (Figure 8). The block labeled Zbal is the balancing network necessary to match the line impedance. MICROPHONE AMPLIFIER The microphone amplifier (Pin 10, 11) has the noninverting input internally connected to VB, while the inverting input and the output are pinned out. Unlike most op-amps, the amplifier has an all-NPN output stage, which maximizes phase margin and gain-bandwidth. This feature ensures stability at gains less than unity, as well as with a wide range of reactive loads. The open loop gain is typically 80 dB (f<100 Hz), and the gain-bandwidth is typically 1.0 MHz. The maximum p-p output swing is typically 1.0 volt less than VCC with an output impedance of <10 until curent limiting is reached (typically 1.5 mA). Input bias current at MCI is typically 40 nA out of the pin. Figure 5. Microphone Amplifier and MUTE FILTER The operation of the filter circuit is determined by the external components. The circuit within the IL34118, from pins FI to FO is a buffer with a high input impedance (>1.0 M), and a low output impedance (<50 ). The configuration of the external components determines whether the circuit is a highpass filter (as shown in Figure 8), a low-pass filter, or a band-pass filter. Figure 6. High Pass Filter The muting function (Pin 12), when activated, will reduce the gain of the amplifier to = -39 dB (will RMI = 5.1 K) by shorting the output to the inverting input (see Figure 5). The mute input has a threshold of 1.5 volt, and the voltage at this pin must be kept withing the range of ground and VCC. If the mute function is not used, the pin should be grounded. As a high pass filter, with the components shown in Figure 6 the filter will keep out 60 Hz (and 120 Hz) hum which can be picked up by the external telephone lines. 6 IL34118 As a low pass filter (Figure 7), it can be used to roll off the high and frequencies in the receive circuit, which aids protecting against acoustic feedback problems. With an appropriate choice of an input coupling capacitor to the low pass filter, a band pass filter is formed. Figure 7. Low Pass Filter The output voltage at VB (Pin 15) is (VCC - 0.7)/2, and provides the ac ground for the system. The output impedance at VB is 400 , and in conjunction with the external capacitor at VB, forms a low pass filter for power supply rejection. Since VB biases the microphone and hybrid amplifiers, the amount of supply rejection at their outputs is directly related to the rejection at VB, as well as their respective gains. The Chip Disable (Pin 3) permits powering down the IC to conserve power and/or for muting purposes. With CD0.8 volts, normal operation is in effect. With CD2.0 volts and VCC, the IC is powered down. In the powered down mode, the microphone and the hybrid amplifiers are disabled, and their outputs go to a high impedance state. Additionally, the bias is removed from the filter (Pins 1, 2), the attenuators (Pins 8, 9, 21, 22), or from Pins 13, 14, and 15 (the attenuators are disabled, however, and will not pass a signal). The input impedance at CD is typically 90 k, has a threshold of 1.5 volts, and the voltage at this pin must be kept within the range of ground and VCC. If CD is not used, the pin should be grounded. POWER SUPPLY, DISABLE VB, AND CHIP The power supply voltage at VCC (Pin 4) is to be between 3.5 and 6.5 volts for normal operation, with reduced operation possible down to 2.8 volts. PIN DESCRIPTION Pin No 1 2 3 4 Designation FO FI CD VCC Description Filter output. Output impedance is less than 50. Filter input. Input impedance is greater than 1.0 M. Chip Disable. A logic low (<0.8 V) sets normal operation. A logic high (>2.0 V) disables the IC to conserve power. Input impedance is nominally 90 K. A supply voltage of +2.8 to +6.5 Volts is required, at 5.0 mA. As VCC falls from 3.5 to 2.8 Volts, an AGC circuit reduces the receive attenuator gain by 25 dB (when in the receive mode). Output of the second hybrid amplifier. The gain is internally set at -1.0 to provide a differential output, in conjunction with HTO-, to the hybrid transformer. Output of the first hybrid amplifier. The gain of the amp is set by external resistors. Input and summing node for the first hybrid amplifier. DC level is VB. Output of the transmit attenuator. DC level is approximately VB. Input to the transmit attenuator. Max. signal level is 350 mVrms. Input impedance is 10 K. Output of the microphone amplifier. The gain of the amplifier is set by external resistors. Input and summing node of the microphone amplifier. DC level is VB. (continued) 5 6 7 8 9 10 11 HTO+ HTOHTI TXO TXI MCO MCI PIN DESCRIPTION 7 IL34118 Pin No 12 Designation MUT Description Mute input. A logic low (<0.8 V) sets normal operation. A logic high (>2.0 V) mutes the microphone amplifier without affecting the rest of the circuit. Input impedance is nominally 90. Volume control input. When VLC = VB, the receive attenuator is at maximum gain when in the receive mode. When VLC = 0.3 VB, the receive gain is down 35 dB. Does not affect the transmit mode. An RC this pin sets the response time for the circuit to switch modes. An output voltage VCC/2. This voltage is a system ac ground, and biases the volume control. A filter cap is required. An RC at this pin sets the time constant for the transmit background monitor. Input to the transmit level detector on the mike speaker side. Output of the transmit level detector on the mike/speaker side, and input to the transmit background monitor. Output of the receive level detector on the mike/speaker side. Input to the receive level detector on the mike/speaker side. Input to the receive attenuator and dial tone detector. Max input level is 350 mV RMS. Input impedance is 10 K. Output of the receive attenuator. DC level is approximately VB. Input to the transmit level detector on the line side. Output of the transmit level detector on the line side. Output of the receive level detector on the line side, and input to the receive background monitor. Input the receive level detector on the line side. An RC at this pin sets the time constant for the receive background monitor. Ground pin for the entire IC. 13 VLC 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 CT VB CPT TLI2 TLO2 RLO2 RLI2 RXI RXO TLI1 TLO1 RLO1 RLI1 CPR GND MAXIMUM RATINGS* Symbol VCC VIN VIN VIN Tstg * Parameter Supply Voltage (Pin 14) Input Voltage at CD(Pin 3), MUT (Pin 12) Input Voltage at VLC (Pin 13) Input Voltage at TXI(Pin 9), RXI (Pin 21), FI (Pin 2) Storage Temperature Range Value -1.0 to +7.0 -1.0 toVCC +1.0 V -1.0 toVCC +0.5 V -0.5 toVCC +0.5 V -65 to +150 Unit V V V V C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. 8 IL34118 RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN IVB VIN VIN G IL Supply Voltage (Pin 4) Input Voltage at CD (Pin 3), MUT (Pin12) VB Current (Pin 15) Input Voltage at VLC (Pin 13) Attenuator Input Signal Voltage (Pins 9, 21) Microphone Amplifier, Hybrid Amplifier Gain Load Current RXO, TXO Pins 8,22) MCO (Pin 10) HTO-, HTO+ (Pins 6,5) Operating Temperature 0.3 x VB 0 0 0 0 0 -25 Parameter Min 3.5 0 Max 6.5 VCC 500 VB 350 40 2.0 1.0 5.0 +70 Unit V V A V mVrms dB mA TA C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. ELECTRICAL CHARACTERISTICS(TA = -25 to +70C, VCC = 5.0 V , CD = 0.8 V, unless noted) Symbol POWER SUPPLY ICC RCD VCDH VCDL VB GRX GRX GRX1* GRX2* GRX1 GRX3* VCR* Volume Control Range VCC Sypply Current CD Input Resistance CD Input High Voltage CD Input Low Voltage VB Output Voltage Receive Attenuator Gain ( f =1.0 KHz) Rx Mode, RXI=150 mVrms, (VCC=5.0 V) Rx Mode, RXI=150 mVrms (VCC=3.5 V) Gain Change -VCC=3.5 V versus VCC =5.0 V AGC Gain Change - VCC=2.8 V versus VCC=5.0 V Idle Mode, RXI=150mVrms Range (Rx to Tx Mode) Rx Mode, 0.3VB 9 IL34118 ELECTRICAL CHARACTERISTICS(TA = -25 to +70C, VCC = 5.0 V , CD = 0.8 V, unless noted) Symbol VRXO VRXOH VRXOL Parameter RXO DC Voltage RXO High Voltage RXO Low Voltage Test Conditions Rx to Tx Mode IOUT= -1.0 mA,RXI=VB+1.5V, VCT=2.6 V IOUT= +1.0 mA,RXI=VB-1.0V, VCT=2.6 V Output measured with respect to VB RXI=350 mVrms, f = 1.0 KHz Tx Mode, TXI=150 mVrms Idle Mode, RXI=-150 mVrms Range (Tx to Rx Mode) Tx to Rx Mode IOUT= -1.0 mA,TXI=VB+1.5V, VCT=1.6 V IOUT= +1.0 mA,TXI=VB-1.0V, VCT=1.6 V Output measured with respect to VB TXI=350 mVrms, f = 1.0 KHz f = 1 KHz, VLC = VB =CT f = 1 KHz, VLC = VB =CT Guaranteed Limits Min 2.8 Max 190 VB-0.75 mV V V Unit RRXI GTX GTXI GTXI* VTXO VTXOH VTXOL RXI Input Resistance Trasmit Attenuator Gain ( f =1.0 KHz) 5.25 1.5 -25 49 2.8 - 17.5 10.0 -15 54 190 VB-0.75 k dB TXO DC Voltage TXO High Voltage TXO Low Voltage mV V V RTXI ICTR ICTT RFI* VDT* MCOVOS AVOLM VMCOH VMCOL GMT RMUT VMUTH VMUTL TXI Input Resistance CT Source Current (switching to Rx mode) CT Sink Current (switching to Tx mode) CT Fast Idle Internal Resistance Dial Tone Detector Threshold Output Offset Open Loop Gain Output High Voltage Output LowVoltage Muting (Gain) MUT Input Resistance MUT Input-High MUT Input-Low 5.25 -106 +30 1.5 10 17.5 -30 +106 3.6 20 +62 250 VCC 0.8 K A A K mV mV dB V mV dB K V V (continued) ATTENUATOR CONTROL MICROPHONE AMLIFIER (VMUT 0.8 V, A+ = 31 dB, unless otherwise noted) VMCO - VB, Freedback R= 180 K f = 100 Hz IOUT=-1.0 mA,VMCI=VB+1.5 V IOUT=1.0 mA, VMCI=VB - 1.0 V f = 1.0 Khz,VMCI = 150 mV 0.8 V VMUT 2.0 V VCC = VMUT = 6.5 V -62 60 2.8 52 37.5 2.0 0 10 IL34118 ELECTRICAL CHARACTERISTICS(TA = -25 to +70C, VCC = 5.0 V , CD = 0.8 V, unless noted) Symbol Parameter Test Conditions Guaranteed Limits Min HYBRID AMPLIFIERS HVOS HBVOS AVOLH AVCLH VHT-H VHT-L VHT+H VHT+L ITH* HTO - Offset HTO - to HTO+ Offset Open Loop Gain Closed Loop Gain HTO- High Voltage HTO- Low Voltage HTO+ High Voltage HTO+ Low Voltage Transmit-Recieve Switching Threshold VHTO- - VB, Freedback R= 51 K Freedback R= 51 K HTI to HTO-, f = 100 Hz, VHTI = 20 mV HTO- to HTO+ IOUT=-5.0 mA, VHTI=VB -1.0 V IOUT=5.0 mA, VHTI=VB +1.5 V IOUT=-5.0 mA,VHTI=VB +1.5 V IOUT=5.0 mA, VHTI=VB -1.0 V Ratio of Current at RLI1 + RLI2 to 20 A at TLI1 + TLI2 to switch from Tx to Rx VFO -VB, 220 K from VB to FI VB = VFO, VFI = 0 V VB - 25 VB - 37 57 -2.8 2.8 2.8 0.8 VB +25 VB +37 2.2 375 562 1.2 mV mV dB dB V mV V mV Max Unit LEVEL DETECTORS AND BACKGROUND NOISE MONITORS FILTER FOVOS IFO Voltage Offset at FO FO Sink Current VB250 112 VB +25 500 mV A Note. 1. All currents into a device pin are positive, those out of a pin are negative. Algebraic convention rather than magnitude is used to define limits. * @25C 11 IL34118 EXPANDED LOGIC DIAGRAM 12 |
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